The present invention relates to a non-volatile memory device. The object is to improve and stabilize the characteristics of the device.
Recently, non-volatile semiconductor memory devices of MNOS (metal-nitride-oxide-semiconductor) structure have been actively studied and developed, some of which have already been in practical use. These memory devices are classified into two types according to working-principle. One type is avalanche-injection. Another is tunnel-injection. The former, although having merit in memory holding characteristics, has such shortcomings that the working voltage is higher, erasing is not easy and the number of repeated uses is not so large. On the other hand, the latter, although electrically easy with respect to erasing, is inferior to the former in memory holding characteristics, and the number of repeated uses for writing and erasing is less than 10.sup.6 times.
For both types, such shortcomings have been problems in practical use.
FIG. 1(a) shows the structure of a conventional non-volatile semiconductor memory device of the tunnel-injection type, which has an MNOS (metal-nitride-oxide-semiconductor) structure consisting of the source 1, the drain 2, a thin SiO.sub.2 film 3 (thickness being about 20 A) and an Si.sub.3 N.sub.4 film 4 (thickness being 500 to 1,000 A), the SiO.sub.2 film 3 and the Si.sub.3 N.sub.4 film 4 forming a double layered gate film. The structure, also, includes a substrate 5 made of n-type Si. Generally, this device is prepared in the following manner:
First, by a specified diffusion method, an acceptor is diffused into the n-type substrate 5 up to 10.sup.19 to 10.sup.20 atoms/cm.sup.3 so as to form the source region 1 and the drain region 2. Second, a gate opening is formed in an SiO.sub.2 film 6 by a known photo-etching method and the SiO.sub.2 film 3 and the Si.sub.3 N.sub.4 film 4 are grown in the gate opening. Then, and then the gate electrode 7, for instance, of Al film, is disposed on the film 4. Numerals 8 and 9 indicate the source electrode and the drain electrode, respectively. In this case, the gate opening is designed to partly expose the source region 1 and the drain region 2 therefrom, so that a part of the SiO.sub.2 film 3 formed in the opening and a part of the source 1 and drain 2 overlap each other. FIG. 1(b) shows the overlapping part, namely, the part surrounded by a broken line part in FIG. 1(a), in an enlarged view. When a writing memory is formed without such overlapping, the amount of injection from the source region 1 becomes less, and therefore, the amount of memory extremely decreases.
The present inventors empirically confirmed that the existance of the overlapping part 10 affects both the memory holding characteristics and the number of repeated uses of the memory device in the following manner.
Surface concentration of the source and drain region in the overlapping part 10 usually goes as high as 10.sup.19 to 10.sup.20 atoms-cm.sup.-3, and accordingly, the acceptor mixes into the SiO.sub.2 film 3 through the overlapping part 10 during the time the film 3 is grown. Accordingly, the thin SiO.sub.2 film 3 results in containing the acceptor, which acceptor affects the surface of the Si substrate 5 under the SiO.sub.2 film 3. Namely, when a positive or negative voltage is impressed on the gate electrode 7 for writing or erasing in the memory device, a high electric field is impressed across the thin SiO.sub.2 film 3. Consequently, the acceptor concentration in the SiO.sub.2 film 3 varies, and further, the overlapping part suffers a high strain due to a high surface concentration of the source and drain, and hence the insulation of the thin SiO.sub.2 film 3 becomes poor. Accordingly, when positive or negative voltage is repeatedly impressed, the insulation of the SiO.sub.2 film 3 extremely decreases. As a result, electric charges captured at a deep trap level on the interface between the SiO.sub.2 film 3 and the Si.sub.3 N.sub.4 film 4 are discharged to the side of the Si substrate through the SiO.sub.2 film 3, thereby decreasing the memory holding time characteristics.
As mentioned above, decrease of both the memory holding characteristics and the number of repeated uses of devices having such structure as shown in FIG. 1, may occasionally be due to the decrease of insulation in the Si.sub.3 N.sub.4 film 4, but is mostly caused by the decrease of insulation in the thin SiO.sub.2 film 3. That is because the acceptor mixes into the film 3 from the source region 1 and drain region 2.